Formal semantics and proof techniques for optimizing VHDL models
ISBN
0792383753
Formal semantics and proof techniques for optimizing VHDL models is a vhdl book by Kothanda Umamageswaran.
Discover Formal semantics and proof techniques for optimizing VHDL models by Kothanda Umamageswaran, vhdl.
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Kothanda Umamageswaran is the author of Formal semantics and proof techniques for optimizing VHDL models. Browse their full catalog on Booklogr.
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Frequently Asked Questions
What genre is Formal semantics and proof techniques for optimizing VHDL models?+
Formal semantics and proof techniques for optimizing VHDL models is a VHDL book.
Who wrote Formal semantics and proof techniques for optimizing VHDL models?+
Formal semantics and proof techniques for optimizing VHDL models was written by Kothanda Umamageswaran.