High level synthesis of ASICs under timing and synchronization constraints
by David C. Ku
- ISBN
- 0792392442
High level synthesis of ASICs under timing and synchronization constraints is a application specific integrated circuits, computer-aided design book by David C. Ku.
Discover High level synthesis of ASICs under timing and synchronization constraints by David C. Ku, application specific integrated circuits.
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What genre is High level synthesis of ASICs under timing and synchronization constraints?+
High level synthesis of ASICs under timing and synchronization constraints is a Application specific integrated circuits, Computer-aided design, Application-specific integrated circuits, Design and construction, Data processing book.
Who wrote High level synthesis of ASICs under timing and synchronization constraints?+
High level synthesis of ASICs under timing and synchronization constraints was written by David C. Ku.